1. Field of the Invention
The present invention relates to a nonvolatile semiconductor storage device including a failure detection circuit and a method of detecting a failure on a nonvolatile semiconductor storage device.
2. Description of Related Art
In a typical nonvolatile semiconductor storage device, especially, a flash memory, a cell size is large. For this reason, a cell reading current is large and a reading rate is low. As a result, in such the nonvolatile semiconductor storage devices, a cell reading margin is relatively large. That is, variation in a voltage applied to a cell at a reading operation due to manufacturing variations is insignificant. Therefore, in inspection of the nonvolatile semiconductor storage device, for example, as for a word line, it is enough to be able to check presence or absence of short-circuit and disconnection in the word line and check application of a voltage to the word line, and thus a value of the voltage does not constitute a matter of concern.
Japanese Patent Publication JP-A-Heisei 9-245492 discloses a nonvolatile semiconductor storage device as an art related to the above-mentioned inspection. The nonvolatile semiconductor storage device includes a word driver, a word line non-selection level supply circuit and a sense amplifier. The word driver drives a word line with a selection level. The word line non-selection level supply circuit is provided at a far end part of the word line and supplies a non-selection level with a supply capacity lower than the supply capacity of the word driver. The sense amplifier is provided at a data line. In absence of a failure in the word line, the selection level is applied to the word lines for all cells, resulting in that a data reading state is uniform in all cells. However, in presence of disconnection in the word line, the selection level is applied to the word line on a side of the word driver from a disconnection part and the non-selection level is applied to the word line on a side of the word line non-selection level supply circuit from the disconnection part. Therefore, the word line voltage varies across the disconnection part as a boundary. Thus, since the data reading state varies according to cells, a failure on the word line can be detected by sensing the difference.
Japanese Patent No. JP3621334B1 (corresponding U.S. Pat. No. 6,307,778 (B1)) discloses a nonvolatile memory device. The nonvolatile memory device includes an REG, a word line driver, a memory cell and a comparator circuit. The word line driver uses a main word line of a REG output as a power source. The memory cell is connected to a sub word line as an output of the word line driver. The comparator circuit compares a current of the REG with Iref. At this time, when short-circuit occurs in the word line, the REG passes a current even after driving of the word line and the current becomes equal to or greater than a value of Iref. The result is outputted from the comparator, thereby detecting a failure.